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two-address instruction

См. также в других словарях:

  • two-address code — dviadresės komandos kodas statusas T sritis automatika atitikmenys: angl. one plus one address code; two address code vok. Eins plus Eins Adreßcode, m; Zweiadressencode, m rus. код двухадресной команды, m pranc. instruction â deux adresses, f …   Automatikos terminų žodynas

  • instruction â deux adresses — dviadresės komandos kodas statusas T sritis automatika atitikmenys: angl. one plus one address code; two address code vok. Eins plus Eins Adreßcode, m; Zweiadressencode, m rus. код двухадресной команды, m pranc. instruction â deux adresses, f …   Automatikos terminų žodynas

  • Instruction cycle — An instruction cycle (sometimes called fetch and execute cycle, fetch decode execute cycle, or FDX) is the basic operation cycle of a computer. It is the process by which a computer retrieves a program instruction from its memory, determines what …   Wikipedia

  • Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… …   Wikipedia

  • One instruction set computer — Computer science portal A one instruction set computer (OISC), sometimes called an ultimate reduced instruction set computer (URISC), is an abstract machine that uses only one instruction – obviating the need for a machine language opcode …   Wikipedia

  • one-plus-one-address code — dviadresės komandos kodas statusas T sritis automatika atitikmenys: angl. one plus one address code; two address code vok. Eins plus Eins Adreßcode, m; Zweiadressencode, m rus. код двухадресной команды, m pranc. instruction â deux adresses, f …   Automatikos terminų žodynas

  • Burroughs large systems instruction set — The B5000 instruction set is the set of valid operations for the Burroughs large systems including the current (as of 2006) Unisys Clearpath/MCP systems. These unique machines have a distinctive design and instruction set. Each word of data is… …   Wikipedia

  • Three address code — In computer science, three address code (often abbreviated to TAC or 3AC) is a form of representing intermediate code used by compilers to aid in the implementation of code improving transformations. Each instruction in three address code can be… …   Wikipedia

  • Atmel AVR instruction set — Here is the basic Atmel AVR instruction set.Arithmetic operations work on registers R0 R31 but not directly on RAM and take one clock cycle, except for multiplication and word wide addition (ADIW and SBIW) which take two cycles.RAM and I/O space… …   Wikipedia

  • Direct Instruction — This article discusses a particular pedagogical model, as is found in DISTAR and related programs. For more general discussion see direct instruction. Direct Instruction (DI) is an instructional method that is focused on systematic curriculum… …   Wikipedia

  • Cycles per instruction — In computer architecture, cycles per instruction (aka clock cycles per instruction, clocks per instruction, or CPI) is a term used to describe one aspect of a processor s performance: the number of clock cycles that happen when an instruction is… …   Wikipedia

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